TSMC Building PLP Mass Production System to Compete with Samsung, Targets 2027 Launch

According to etnews, on June 15, TSMC is constructing its materials, components, and equipment (MCE) supply chain to establish panel-level packaging (PLP) mass production capacity, with plans to begin production as early as 2027. The company is currently in discussions with MCE providers globally regarding equipment investments.

PLP technology enables significantly higher chip output compared to traditional wafer-level packaging. Using standard 600×600 mm rectangular panels instead of 300 mm circular wafers, PLP can produce approximately five to six times more chips with zero waste. TSMC has already secured a major global AI chip customer and is expected to complete a test production line this year before scaling up. The move intensifies competition with Samsung Electronics, which has led the PLP market since acquiring the technology in 2019.